Established test processes cannot deal with the risks in assembly 3D packages. New process steps are applied on the ultra-thin wafer in between probing and assembly. Bad parts in a die stack can corrupt good ones. KGDs cannot eliminate the risk. Final test is very late, before they get discovered during final test. Smart test distribution with sharing as many data as possible will add the concept of “known good stack”.
Increasing complexity of the assembly process requires close cooperation between semiconductor manufacturers and equipment companies. 3D packages will increase the amount of possible defects and also the resulting monetary loss. Additional tests are required. Ideal set-ups from wafer probing to final test will leverage process synergies. Experienced equipment suppliers are needed to cooperatively develop the best possible solution.
With leading technology and expertise in all critical elements of the test cell, Xcerra Corporation is able to provide our customers fully-integrated, pre-validated solutions including the tester, handler, device under test (DUT) interface board and contactors, which will take semiconductor test to the next level. To learn more about TCI, please click here http://xcerra.com/tci
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